This is a single color dot LED matrix with 1024 points. Access to the individual light points is provided by two longitudinal 32-pin connectors connected directly to the LED matrix. Thanks to the 0,1 inch raster, the DLM3232 is compatible with Solderless Breadboards, which allows the developer to comfortably prototyping new image control units.
It is a controller for the display Led matrix with 32*32 bus (for 1024 Led points). This controller works on an 8bit data bus and 4 selection signals that silage 8bit data into 4 columns. Row control is handled by a 32-bit shift register. Its clock input and the first output connected to the connector allow image synchronization and alignment and other options for an external microcontroller. In addition, HAS1 has one analog input for brightness control.
The unit is suitable for teaching image programming, but can also be applied to professional display panels. Thanks to its versatility, it is possible to stack several identical units horizontally and vertically next to each other, which will allow the creation of a large-format panel.
dlm3232.c
/*
* dlm3232.c
*
* Created on: 5. 10. 2018
* Author: IvanMahdik
*/
#include
#include
#include "pin_Layout.h"
#include "dlm3232.h"
void dlm3232_initial(void);
void dlm3232_CL(void);
void dlm3232_alignment(void);
void dlm3232_print(uint32_t *array_scene_fn);
uint32_t array_scene[32];
void dlm3232_initial(void)
{
dlm3232_DATA_DDR = 0xFF; //8bit data bus line
dlm3232_DATA_PORT = 0x00;
dlm3232_LATCH_EN_DDR |= _BV(dlm3232_LATCH_EN1_P) | _BV(dlm3232_LATCH_EN2_P) | _BV(dlm3232_LATCH_EN3_P) | _BV(dlm3232_LATCH_EN4_P); //Latch 1-4
dlm3232_LATCH_EN_PORT &= ~_BV(dlm3232_LATCH_EN1_P) & ~_BV(dlm3232_LATCH_EN2_P) & ~_BV(dlm3232_LATCH_EN3_P) & ~_BV(dlm3232_LATCH_EN4_P);
dlm3232_CL_DDR |= _BV(dlm3232_CL_P); //Clock
dlm3232_CL_PORT &= ~(1 << dlm3232_CL_P);
dlm3232_ALIGNMENT_DDR &= ~_BV(dlm3232_ALIGNMENT_P); //Alignment
dlm3232_ALIGNEMNT_PORT &= ~_BV(dlm3232_ALIGNMENT_P);
for (int i = 0; i < 32; i++) //set to initial/erase memory for 32*32bits
array_scene[i] = 0;
}
void dlm3232_CL(void) //clock //otestovat _delay_us(0.2/2) pri inline a klasickej funkcii
{
dlm3232_CL_PORT |= (1 << dlm3232_CL_P);
_delay_us(0.001);
dlm3232_CL_PORT &= ~(1 << dlm3232_CL_P);
_delay_us(0.001);
}
void dlm3232_alignment(void) //alignment of shift register
{
while ((dlm3232_ALIGNMENT_PIN & _BV(dlm3232_ALIGNMENT_P)) == 0)
dlm3232_CL();
}
void dlm3232_print(uint32_t *array_scene_fn)
{
dlm3232_alignment(); //alignment of shift register
for (int i = 0; i < 32; i++) //screen view
{
for (int j = 0, shift = 0; j < 4; j++, shift += 8)
{
dlm3232_DATA_PORT = (array_scene_fn[i] >> shift) & 0xFF; //write data to PORT
dlm3232_LATCH_EN_PORT |= (1 << j); //latch ENNABLE
dlm3232_LATCH_EN_PORT &= ~(1 << j); //latch DISABLE
}
// sei(); //enable all interrupt.
_delay_us(650); //LED ON
// cli(); //disable all interrupt.
dlm3232_DATA_PORT = 0x00; //erase port
dlm3232_LATCH_EN_PORT |= 0xF; //LED OFF
dlm3232_LATCH_EN_PORT &= ~0xF;
dlm3232_CL(); //clock to shift register
}
}
dlm3232.h
/*
* dlm3232.h
*
* Created on: 5. 10. 2018
* Author: IvanMahdik
*/
#ifndef HEADER_DLM3232_H_
#define HEADER_DLM3232_H_
extern void dlm3232_initial(void);
extern void dlm3232_print(uint32_t *array_scene_fn);
extern uint32_t array_scene[32];
#define dlm3232_size_x 32
#define dlm3232_size_y 32
#endif /* HEADER_DLM3232_H_ */
pin_Layout.h
/*
* pin_Layout.h
*
* Created on: 5. 10. 2018
* Author: IvanMahdik
*/
#ifndef HEADER_PIN_LAYOUT_H_
#define HEADER_PIN_LAYOUT_H_
#define ATMEGA2560 //version pin_Layout for ATMEGA2560
#define DLM3232 //DLM3232
#ifdef ATMEGA2560
#include
#include
#define F_CPU 16000000UL
#ifdef DLM3232
#define dlm3232_DATA_DDR DDRA //data to display
#define dlm3232_DATA_PORT PORTA
#define dlm3232_LATCH_EN_DDR DDRB //latch
#define dlm3232_LATCH_EN_PORT PORTB
#define dlm3232_LATCH_EN1_P PB0 //EN1
#define dlm3232_LATCH_EN2_P PB1 //EN2
#define dlm3232_LATCH_EN3_P PB2 //EN3
#define dlm3232_LATCH_EN4_P PB3 //EN4
#define dlm3232_CL_DDR DDRB //clock
#define dlm3232_CL_PORT PORTB
#define dlm3232_CL_P PB4
#define dlm3232_ALIGNMENT_DDR DDRB //alignment
#define dlm3232_ALIGNMENT_PIN PINB
#define dlm3232_ALIGNEMNT_PORT PORTB
#define dlm3232_ALIGNMENT_P PB5
#define NC_DDR1 DDRB //NC PORTB
#define NC_PORT1 PORTB
#define NC_P1_1 PB6
#define NC_P1_2 PB7
#define NC_DDR2 DDRC //NC PORTC
#define NC_PORT2 PORTC
#define NC_DDR3 DDRD //NC PORTD
#define NC_PORT3 PORTD
#define NC_P3_1 PD0
#define NC_P3_2 PD1
#define NC_P3_3 PD3
#define NC_P3_4 PD4
#define NC_P3_5 PD5
#define NC_P3_6 PD6
#define NC_P3_7 PD7
#endif /* DLM3232 */
#endif /* ATMEGA2560 */
#endif /* HEADER_PIN_LAYOUT_H_ */
Thanks to the practical layout of the connectors, the DLM3232 unit is compatible with a grid of Solderless Breadboards, which allows the developer to comfortably prototype new imaging systems. Thanks to this method, the HAS1 architecture was created in a few minutes of prototyping.
Thanks to the practical layout of the connectors, the DLM3232 unit is compatible with a grid of Solderless Breadboards, which allows the developer to comfortably prototype new imaging systems. Thanks to this method, the HAS1 architecture was created in a few minutes of prototyping.
ALL RIGHTS RESERVED
Bank connection
CZ7961000000001016845862
ALL RIGHTS RESERVED
ALL RIGHTS RESERVED
Bank connection
CZ7961000000001016845862